» Physics of Information Colloquium «
Jointly with the Quantum Computation and Information Seminar
Latest Developments at the
Google Quantum Artificial Intelligence Lab
Hartmut Neven
(Google Inc.)
Date and time: Tuesday 10 May 2016, at 14:00
Location: Abreu Faro Amphitheatre, Interdisciplinary Building, IST, Lisbon
Abstract:
I will describe two architectures, quantum annealers and quantum circuits, that the Quantum AI team at Google is currently developing in order to accelerate tasks important for AI. Quantum annealers are a promising tool to find good solutions to hard combinatorial optimization problems. In recent benchmarking we were able to demonstrate that finite range quantum tunneling enables the D-Wave 2X quantum annealer to solve crafted benchmark problems 10^8 times faster than thermal annealing that does not employ tunneling. We are now studying whether speedups are also available for generic problems such as Boolean satisfiability problems and find this is indeed the case. I will discuss the implications of these studies for the design of next generation quantum annealers. The second class of quantum processors we are developing are quantum circuits. Those were initially devised as an architecture to achieve digital error corrected quantum computation. In the near term however when the number of physical qubits is still small quantum circuits have to be operated as an analog device. Yet, with high fidelity gate operations and low measurement error it is possible to achieve quantum supremacy over all known classical algorithms with just about 50 qubits. The talk will conclude with an outlook how to apply quantum resources to enhance artificial intelligence. As an example of how to use quantum annealing in machine learning, I will describe learning from very noisy data. Using the quantum circuits we implemented what could be described as a quantum neural network. In a first application, we used such a circuit to calculate the energy surface of molecular hydrogen to chemical precision.
Organized by:
(Google Inc.)
Date and time: Tuesday 10 May 2016, at 14:00
Location: Abreu Faro Amphitheatre, Interdisciplinary Building, IST, Lisbon
Abstract:
I will describe two architectures, quantum annealers and quantum circuits, that the Quantum AI team at Google is currently developing in order to accelerate tasks important for AI. Quantum annealers are a promising tool to find good solutions to hard combinatorial optimization problems. In recent benchmarking we were able to demonstrate that finite range quantum tunneling enables the D-Wave 2X quantum annealer to solve crafted benchmark problems 10^8 times faster than thermal annealing that does not employ tunneling. We are now studying whether speedups are also available for generic problems such as Boolean satisfiability problems and find this is indeed the case. I will discuss the implications of these studies for the design of next generation quantum annealers. The second class of quantum processors we are developing are quantum circuits. Those were initially devised as an architecture to achieve digital error corrected quantum computation. In the near term however when the number of physical qubits is still small quantum circuits have to be operated as an analog device. Yet, with high fidelity gate operations and low measurement error it is possible to achieve quantum supremacy over all known classical algorithms with just about 50 qubits. The talk will conclude with an outlook how to apply quantum resources to enhance artificial intelligence. As an example of how to use quantum annealing in machine learning, I will describe learning from very noisy data. Using the quantum circuits we implemented what could be described as a quantum neural network. In a first application, we used such a circuit to calculate the energy surface of molecular hydrogen to chemical precision.
Organized by:
- Doctoral Programme in the Physics and Mathematics of Information:
Foundations of Future Information Technologies (DP-PMI) - Physics of Information and Quantum Technologies Group, Instituto de Telecomunicações
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Supported by:
Fundação para a Ciência e a Tecnologia (PD/00204/2012 and UID/EEA/50008/2013).
Event poster available here.
Fundação para a Ciência e a Tecnologia (PD/00204/2012 and UID/EEA/50008/2013).
Event poster available here.